Implementation of a vectorized version of Klein-Nishina equation on Intel Xeon Phi coprocessor

Abstract

A vectorized implementation for Klein-Nishina equation together with a simple test program using assembly language is developed in this thesis. Using this implementation, we are able to observe great speedup on the Intel® Xeon Phi™ coprocessor. While our implementation keeps the algorithm as a time complexity of O(n), we successfully controlled the growth rate of the algorithm, thus gaining a speedup up to 14x. In the comparison with compiler-generated assembly code from C source code, we found out the automatically generated code is not able to vectorize the execution process while we are able to vectorize it using various instructions such as blending instructions and gather/scatter combination instructions. We believe this is the main reason for the speedup we have observed. In addition, the frequent data conversion performed by the compiler also slowed down the calculation.