Development of front-end electronics for large area solid-state neutron detector arrays

Abstract

Solid-state neutron detectors represent a potential replacement technology for Helium-3 gas filled tubes used for detection of special nuclear materials. When scaling these detectors to very large areas the design of the associated electronics becomes critical to overall detection efficiency. This thesis explores the implementation of low noise readout electronics optimized for large area semiconductor neutron detector arrays. The readout system consists of a charge sensitive preamplifier, pulse shaper, and fast threshold crossing discriminator. Three different designs have been implemented, two of which are built using discrete parts on a printed circuit board while the third has been fabricated using the IBM 0.13um CMOS process. Additionally, a novel preamplifier topology, utilizing a capacitance canceling input stage, is presented. Experimental results show that the utilization of a capacitance canceling stage has the capability to lower preamplifier noise by up to 15%. Finally, the CMOS implementation possesses the highest reported performance, in terms of noise and power, for high capacitance detectors to date.