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dc.rights.licenseRestricted to current Rensselaer faculty, staff and students. Access inquiries may be directed to the Rensselaer Libraries.
dc.contributorHuang, Zhaoran Rena
dc.contributorBhat, Ishwara B.
dc.contributorZhang, Tong
dc.contributorJi, Wei
dc.contributor.authorKim, Young Hwa
dc.date.accessioned2021-11-03T09:09:46Z
dc.date.available2021-11-03T09:09:46Z
dc.date.created2019-09-18T22:38:02Z
dc.date.issued2019-05
dc.identifier.urihttps://hdl.handle.net/20.500.13015/2399
dc.descriptionMay 2019
dc.descriptionSchool of Engineering
dc.description.abstractSilicon electro-optical (EO) modulator is one of the key devices in achieving high performance chip-scale optical interconnections. The modulators have been improved dramatically in recent years, especially increasing its bandwidth range to the multiple gigahertz regime. The optical modulator performance metrics in energy consumption, footprint, device structure simplicity, maximum bandwidth and modulation efficiency have become more crucial than ever. Up to date, the smallest dimension of reported optically efficient interleaved PN junction based silicon optical modulator has a pitch width of 400 nm. This large pitch width results in a π-phase shift length of 1.5 to 3 mm, and requires a high driving voltage over 3V.
dc.description.abstractInterleaved modulators of 60nm pitch size, 100nm and 200nm was modeled at various doping levels. The designed and fabricated 178 nm PN junction pitched interleaved silicon optical modulator is projected to show the modulation efficiency of 0.45 V-cm at 1 V and 0.47 V-cm at 2 V. In comparison with the state of art device with modulation efficiency of 0.8 V-cm at 4 V, our projection improves the efficiency by approximately twice at half the driving voltage.
dc.description.abstractThis research focuses on the design and fabrication of interleaved PN junction based silicon optical modulator. The key challenge is to determine the process parameters of the ion implantation process to form the interleaved P and N junction with a pitch size of 60 nm to 200 nm. The ion energy, tilt angle, dose have been studied using Monte Carlo based the Stopping of Range of Ions in Matter computational method to determine the ion implantation depth and lateral and longitudinal straggle. Sentaurus Process Monte Carlo simulation is also carried on compute the interleaved PN junction doping concentration profile, which later on was imported to Lumerical for the modulator π-phase shift length calculation. The fabrication of the designed interleaved modulator was carried on at Center for Functional Nanomaterials at Brookhaven National Laboratory cleanroom. The major steps include ion implantation mask definitions and silicon waveguide formation through electron beam lithography and Deep Reaction Ion Etching.
dc.language.isoENG
dc.publisherRensselaer Polytechnic Institute, Troy, NY
dc.relation.ispartofRensselaer Theses and Dissertations Online Collection
dc.subjectElectrical engineering
dc.titleLow voltage driven interleaved silicon optical modulator
dc.typeElectronic thesis
dc.typeThesis
dc.digitool.pid179663
dc.digitool.pid179664
dc.digitool.pid179665
dc.rights.holderThis electronic version is a licensed copy owned by Rensselaer Polytechnic Institute, Troy, NY. Copyright of original work retained by author.
dc.description.degreePhD
dc.relation.departmentDept. of Electrical, Computer, and Systems Engineering


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