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dc.rights.licenseRestricted to current Rensselaer faculty, staff and students. Access inquiries may be directed to the Rensselaer Libraries.
dc.contributorPearlman, William A.
dc.contributorWoods, John W. (John William), 1943-
dc.contributorSaulnier, Gary J.
dc.contributorKrishnamoorthy, M. S.
dc.contributor.authorHu, Yang
dc.date.accessioned2021-11-03T10:18:45Z
dc.date.available2021-11-03T10:18:45Z
dc.date.created2012-02-01T16:10:22Z
dc.date.issued2011-12
dc.identifier.urihttps://hdl.handle.net/20.500.13015/3433
dc.descriptionDecember 2011
dc.descriptionSchool of Engineering
dc.language.isoENG
dc.publisherRensselaer Polytechnic Institute, Troy, NY
dc.relation.ispartofRensselaer Theses and Dissertations Online Collection
dc.subjectElectrical engineering
dc.titleSignificance map exploitation for bit rate reduction and error resilience improvement
dc.typeElectronic thesis
dc.typeThesis
dc.digitool.pid32565
dc.digitool.pid32566
dc.digitool.pid32568
dc.digitool.pid32567
dc.digitool.pid32569
dc.rights.holderThis electronic version is a licensed copy owned by Rensselaer Polytechnic Institute, Troy, NY. Copyright of original work retained by author.
dc.description.degreePhD
dc.relation.departmentDept. of Electrical, Computer, and Systems Engineering


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