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dc.rights.licenseRestricted to current Rensselaer faculty, staff and students. Access inquiries may be directed to the Rensselaer Research Libraries.
dc.contributorMcDonald, John F. (John Francis), 1942-
dc.contributorLe Coz, Yannick L.
dc.contributorZhang, Tong
dc.contributorLu, T.-M. (Toh-Ming), 1943-
dc.contributor.authorDiao, Jiedong
dc.date.accessioned2021-11-03T10:41:01Z
dc.date.available2021-11-03T10:41:01Z
dc.date.created2007-05-29T13:00:48Z
dc.date.issued2006-12
dc.identifier.urihttps://hdl.handle.net/20.500.13015/3759
dc.descriptionDecember 2006
dc.descriptionSchool of Engineering
dc.language.isoENG
dc.publisherRensselaer Polytechnic Institute, Troy, NY
dc.relation.ispartofRensselaer Theses and Dissertations Online Collection
dc.subjectcomputer
dc.subjectand systems engineering
dc.subjectElectrical
dc.titleHigh speed on-chip interconnect modeling and reliability assessment
dc.typeElectronic thesis
dc.typeThesis
dc.digitool.pid5709
dc.digitool.pid5710
dc.digitool.pid5712
dc.digitool.pid5711
dc.digitool.pid5713
dc.rights.holderThis electronic version is a licensed copy owned by Rensselaer Polytechnic Institute, Troy, NY. Copyright of original work retained by author.
dc.description.degreePhD
dc.relation.departmentDept. of Electrical, Computer, and Systems Engineering


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