Modeling and characterization of amorphous silicon thin film transistors

Abstract

The thesis presents modeling of capacitance-voltage characteristics of thin film transistors and thermal analysis of self-heating effects in thin film transistors and transistor arrays. The parameter extraction from C-V measurements is described and the limitations of the C-V characterization are discussed. The distributive nature of the capacitance in the device channel is shown to account for the capacitance frequency dispersion. To zero order, this effect can be reproduced by a lumped element equivalent circuit proposed by Elmore (the Elmore model) and by a new Variable Dispersion Model (VDM) accounting for finite interaction time between traps and states above the mobility edge. VDM has been developed and implemented in AIM-Spice. The combined VDM-Elmore model is shown to reproduce the entire dispersion observed in printed TFTs. Dynamic thermal simulations for an amorphous Si TFT show that the temperature rise due to self heating can be noticeable (a few degrees for relatively short interconnects). We also present the dynamic thermal circuit for a TFT pixel that was simulated in Spice.