Dielectric breakdown in nano-porous thin films

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Authors
Borja, Juan Pablo
Issue Date
2014-08
Type
Electronic thesis
Thesis
Language
ENG
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Chemical engineering
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Abstract
Unknown to most computer users and mobile device enthusiasts, we have finally entered into a critical age of chip manufacturing. January of 2014 marks the official start of the quest by the semiconductor industry to successfully integrate sub 14nm process technology nodes in accordance to the International Technology Roadmap for Semiconductors (ITRS). The manufacturing of nano-scale features represents a major bottleneck of its own. However, a bigger challenge lies in reliably isolating the massive chip interconnect network. The present work is aimed at generating a theoretical and experimental framework to predict dielectric breakdown for thin films used in computer chip components. Here, a set of experimental techniques are presented to assess and study dielectric failure in novel thin films. A theory of dielectric breakdown in thin nano-porous films is proposed to describe combined intrinsic and metal ion catalyzed failure. This theory draws on experimental evidence as well as fundamental concepts from mass and electronic charge transport.
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August 2014
School of Engineering
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Rensselaer Polytechnic Institute, Troy, NY
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