CAD for RSFQ design and applications to phase locked loops
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Authors
Haslam, Andrew
Issue Date
2018-12
Type
Electronic thesis
Thesis
Thesis
Language
ENG
Keywords
Electrical engineering
Alternative Title
Abstract
The JJ PLL created for this research is designed to be manufactured in the MIT Lincoln Labs SFQ5ee process. A phase-frequency detector, divider chain, and voltage-controlled oscillator where designed and the schematic of these designs where verified and optimized using hSFQHDLC. The phase-frequency detector and divider chain where submitted for manufacture under the SFQ5ee process, measuring 259.05 x 120.9 uM and 109.15 x 13.95 uM respectively.
Description
December 2018
School of Engineering
School of Engineering
Full Citation
Publisher
Rensselaer Polytechnic Institute, Troy, NY