Interface to the F-15 Radar Data Processor

Abstract

On board the F-15 jet is a Radar Data Processor (RDP) which controls various functions of the radar system. Presently, when servicing is necessary on the RDP it has to be physically removed from the plane, to a test bench system. This procedure of removing the RDP, servicing, and then reinstalling it, is a lengthy operation (typically five-ten days). In an effort to reduce this down time, the Air Force proposed a portable system that could be used on the runway for limited diagnostic and boot-strapping purposes. This thesis details a hardware interface unit (IU) that was designed between the RDP and the Z80 microcomputer. In general, the IU would provide the ability to: • Read/write main memory • Do address comparing (for real time memory mapping) • Interrogate the RDP registers • Converse with the RDP's main bus • Provide buffering of all signals available from the RDP