High-performance memory systems using SiGe HBT BiCMOS Technology
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Authors
Liu, Xuelian
Issue Date
2014-05
Type
Electronic thesis
Thesis
Thesis
Language
ENG
Keywords
Electrical engineering
Alternative Title
Abstract
A 128Kbit BiCMOS SRAM with a typical access time of 125ps was developed. The fast access time with moderate power dissipation has been achieved using following techniques: CML decoder, CML driver circuit, and bipolar sense amplifier. CMOS 6T memory cell is used to achieve the high packing density. The test result demonstrates that this SRAM macro can achieve working frequency of 4GHZ. This macro is especially useful for realizing ultrahigh speed, high density SRAMs which is used as L1 cache in the super computing processor.
Description
May 2014
School of Engineering
School of Engineering
Full Citation
Publisher
Rensselaer Polytechnic Institute, Troy, NY