Improve speed performance of mass data storage systems
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Authors
Hao, Jingpeng
Issue Date
2021-08
Type
Electronic thesis
Thesis
Thesis
Language
en_US
Keywords
Electrical engineering
Alternative Title
Abstract
The objective of this thesis is to develop system-level design techniques that can improve the speed performance of mass data storage fabric built on low-cost magnetic recording hard disk drives (HDDs). This thesis first presents a design framework aiming to mitigate occasional HDD fail-slow. Due to their mechanical nature, HDDs may occasionally suffer from spikes of abnormally high internal read retry rates, leading to temporarily significant degradation of speed (especially the read latency). Intuitively, one could expect that existing system-level data redundancy (e.g., RAID or distributed erasure coding) may be opportunistically utilized to mitigate HDD fail-slow. Nevertheless, current practice tends to use system-level redundancy merely as a safety net, i.e., reconstruct data sectors via system-level redundancy only after the costly intra-HDD read retry fails. This thesis shows that one could much more effectively mitigate occasional HDD fail-slow by more pro-actively utilizing existing system-level data redundancy, in complement to (or evenreplacement of) intra-HDD read retry. To enable this, HDDs should support a higher degree of controllability and observability in terms of their internal read retry operations. Assuming a very simple form enhanced HDD controllability and observability, this thesis presents design solutions and a mathematical formulation framework to facilitate the practical implementation of such a pro-active strategy for mitigating occasional HDD fail-slow. Using RAID as a test vehicle, our experimental results show that the proposed design solutions can effectively mitigate the RAID read latency degradation even when HDDs suffer from read retry rates as high as 1% or 2%.
This thesis further studies the design of device-managed SMR (Shingled magnetic recording) HDD, which allows computing systems to deploy SMR HDD without any changes to existing file systems and applications. By trading the convenient in-place update feature for smaller disk track pitch, SMR HDD is the most economically viable option to sustain the continuous bit cost reduction of HDD. Regardless of the specific design techniques, device-managed SMR HDD demands sufficient memory resource to realize flexible LBA-PBA address translation and effectively mitigate fragmentation-induced SMR HDD speed performance degradation. Due to the stringent cost constraint, SMR HDD typically integrates up to only a few hundred MBs of DRAM. Therefore, this thesis focuses on a host-assisted device-managed framework, where SMR HDD behaves as an append-only zoned storage device and the host-side block device driver elastically utilizes the host-side memory resource to realize address translation and mitigate performance degradation. Under this framework, this thesis presents a set of techniques, including defragmentation-centric write buffer management, fragmentation-adaptive tree-based address mapping, and fragmentation-aware GC, which together can efficiently utilize host memory resource to realize address translation and mitigate drive performance degradation. Using a variety of disk access IO traces and benchmarks, this thesis carried out experiments that well demonstrate the effectiveness of the proposed design techniques.
The third work in this thesis studies utilizing the growing family of solid-state drives (SSDs) with built-in transparent compression to simplify the data structure of cache design. Such storage hardware allows the user applications to intentionally under-utilize logical storage space (i.e., sparse LBA utilization, and sparse storage block content) without sacrificing the physical storage space. Accordingly, this work proposed an index-less cache management approach to largely simplify the flash-based cache management by leveraging SSDs with built-in transparent compression. We carried out various experiments to evaluate the write amplification and read performance of the proposed cache management, and the results show that our proposed index-less cache management can achieve comparable or much better performance than the conventional policies while consuming much less host computing and memory resources.
Description
August 2021
School of Engineering
School of Engineering
Full Citation
Publisher
Rensselaer Polytechnic Institute, Troy, NY