Nanoscale techniques for investigating material issues in quantum dot based nanoelectronics

Abstract

The current scaling of feature size of complementary metal oxide semiconductor (CMOS) transistors has been predicted to reach its limits by around the end of this decade. Therefore, several competing strategies for the post-CMOS era are under investigation. These strategies are based on materials such as graphene, carbon nanotubes and semiconductor nanostructures. The focus of this dissertation in on two key materials issues pertaining to semiconductor nanostructures, more specifically Ge-Si quantum dot based nano-electronics. In the GexSi(1-x)/Si(100) system nanostructures such as quantum dots (QDs) and quantum dot molecules, QDMs--complex assemblies of QDs and pyramidal pits wherein the QDs exist at the edges of the pits--are candidate structures for nano-logic switches based on charge and spin property of carriers localized within these quantum structures.